The Invisible Ceiling: Executive Summary

Build your own chip and you escape NVIDIA's pricing power — that was the call. A design team was assembled, and the words "in-house accelerator" went into the roadmap. Six months later, what stood in the way just before mass production was not the design, nor the yield, but a single line of booking status: CoWoS capacity is full through next year.

In place of the monopoly you thought you had escaped, another name quietly rises from the bottom of the news. Not NVIDIA. TSMC.

This is not the bad luck of one company. Google, AMD, Amazon — every player that raised the banner of "our own chip to escape NVIDIA" has stalled, as if stamped from the same mold, on the same single line. Why, after winning the design race, does the same name appear at the end? The answer lies far below the layer we usually look at.

CoWoS = Chip on Wafer on Substrate. TSMC's advanced packaging technology, which mounts a compute die and high-speed memory densely onto a single base and wires them together. It is the core "assembly" step that unlocks an AI chip's performance.

Each Layer of Semiconductors Has Its "Only Company"

Trying to grasp the semiconductor industry as a single picture usually leads you astray. The reality is a stack of layers with utterly different characters — design, manufacturing, equipment, materials — each an independent industry in its own right.

And as you look through the layers, a common shape emerges. In every layer sits a single company, or a single country, with almost no substitute.

In the manufacturing layer sits TSMC. For the most advanced logic chips — sub-5-nanometer compute dies — TSMC is said to hold roughly 90 percent. However excellent a blueprint may be, there is effectively only one factory in the world that can burn it into a physical chip. Here, "manufacturing" means the foundry: a company that takes commissions from firms that own the blueprints (fabless companies) and specializes purely in production, holding no designs of its own. Neither NVIDIA nor Apple owns factories; both entrust manufacturing to this one company. Precisely because design and manufacturing are separated, demand concentrates on the firm that handles all the production, and an extreme concentration is born.

Fabless / Foundry = A fabless company holds no factory (fab) and focuses on design; a foundry takes that design on commission and focuses on manufacturing. NVIDIA and Apple are fabless and entrust production to a foundry called TSMC. This division between design and manufacturing is the premise of the industry.

Advanced node = A generation defined by how fine a chip's circuitry is. The smaller the figure, such as 3 nanometers, the finer and higher-performing the chip — but the difficulty and cost of manufacturing soar. Building a single leading-edge 3-nanometer plant is said to require over 20 billion dollars, and the sheer weight of that capital is itself a wall against new entrants.

Climb one layer up, into the equipment layer, and there is ASML of the Netherlands. The extreme ultraviolet (EUV) lithography systems indispensable for drawing the most advanced chips can be supplied commercially by ASML alone. It is a literal single point of supply, reached after a development race spanning thirty years.

In the materials layer, Japan quietly holds the linchpin. The 2019 trade friction between Japan and South Korea inadvertently exposed how large a share of the world's supply of manufacturing chemicals — hydrogen fluoride, photoresists — Japan carries. For hydrogen fluoride alone, roughly 70 percent of the world's output is said to be produced in Japan.

The memory layer, the world of high-speed memory, takes the same shape. DRAM is roughly 90 percent in the hands of three companies: Samsung, SK Hynix, and Micron. A market where around ten companies once jostled in the 1990s converged, through consolidation, into this oligopoly.

From design down to materials, with every layer you descend, the choices narrow. This is the true face of the semiconductor industry. The surface looks like a lively contest, yet with each step down it converges toward "the only company," an extreme structure of division of labor.

What Is Most Clogged Today Is Not the Chip but the "Assembly"

Here lies an inversion many people overlook. What actually constrained AI chip supply in 2025 was not the production capacity of the compute chips themselves. What was clogged was the step just before that — assembly. Advanced packaging, that is, CoWoS, and the high-speed memory (HBM) mounted onto it.

HBM = High Bandwidth Memory. High-speed memory stacked and placed right beside the compute chip. AI computation requires exchanging vast amounts of data at high speed, making this memory a lifeline of performance. It is an oligopoly of a few firms, including SK Hynix.

There is a telling figure. By one analyst estimate, the four companies that topped AI chip demand in 2025 consumed roughly 90 percent of the world's CoWoS capacity and HBM, while the leading-edge logic dies themselves accounted for only about 12 percent of usage. Compute chips had room to spare; the step of "assembling" them into practical products hit the ceiling first.

This inversion did not appear overnight. In the autumn of 2023, TSMC's chairman remarked that what was short was not AI chips but CoWoS capacity. For roughly three years since, the industry has been held by the throat by this assembly capacity. Even as TSMC expands capacity at a pace exceeding 80 percent a year, it has been unable to catch up with demand. The reported expansion plans are large in scale, with the direction set toward doubling CoWoS monthly capacity through heavy capital spending in 2026. That the strain still does not ease points to the extraordinary strength of demand.

This counterintuitive picture tells us that a semiconductor's value is not decided by the "computing stone" alone. A high-performance chip cannot fully deliver its power on its own. Only when a compute chip and high-speed memory are placed at close range and linked by countless wires does it become a single product capable of withstanding AI computation. That step of "placing and linking" is precisely CoWoS, and if it clogs, no matter how excellent a compute chip you design, you cannot bring it to the world as a product. A single step of assembly was the rate-limiting factor for the supply of an entire industry.

The ceiling lies one layer below the quality of chip design, in the plain, unglamorous step of "assembly." This fact is the key to understanding why plans to escape NVIDIA stall at the same place. Even if you escape NVIDIA, the layer beneath it stands in the very same spot.

The True Nature of the NVIDIA Monopoly — A Design Moat, and a Ceiling Seized First

When we speak of NVIDIA's strength, we tend to dwell on design. To be sure, the design and software foundation it has built over many years — the ecosystem that has drawn developers in — is an advantage not easily filled. On top of the chip's raw performance sit the development environment and libraries needed to wield it, and the vast accumulated know-how of the engineers gathered there, layer upon layer. For a developer once accustomed to this environment, switching to another company's product carries the burden of relearning and rebuilding. The advantage of design and ecosystem works quietly as this friction of switching. It functions as a moat.

But a moat alone does not fully explain today's monopoly. The other reason is far more concrete. NVIDIA seized the ceiling itself, first.

By analyst estimates, in preparation for launching its next-generation products, NVIDIA secured a majority — roughly 60 percent — of TSMC's CoWoS capacity for 2026 through 2027. Global CoWoS demand for 2026 is estimated at roughly one million units, of which the share NVIDIA has locked up works out to about 60 percent. It is not merely winning on design. It has pre-booked, in bulk, the sole passage that turns a design into a product.

Here the essence of competitive advantage shows its face. NVIDIA's edge lies in holding both the most visible layer at the top (design and software) and the least visible layer at the bottom (the manufacturing and assembly slots), at the same time. With only the top, room for imitation remains. But once the bottom is also held, latecomers are left to fight over "the empty slots on the same passage."

Why "Our Own Chip to Escape NVIDIA" Ends as a Scramble for the Same Slots

By now, the riddle from the opening is solved. The strategy of building your own chip is sound as a move to bypass NVIDIA's moat of design and software. Yet that in-house chip, being physical silicon, must also be manufactured somewhere and assembled somewhere. And that "somewhere" turns out, for each company, to be very nearly the same single firm.

The specifics make it clear. The players who raise the banner of their own chips — Google's TPU produced via Broadcom, AMD, AWS, Microsoft via Marvell, and Meta — try to secure packaging slots that mostly trace back to TSMC supply. By one analyst estimate, of the slots Broadcom secured, a substantial portion for Google's TPU is assembled at TSMC, and the bulk of AMD's secured share is also TSMC supply. AWS, for its part, is estimated to be expanding its CoWoS procurement from 2025 to 2026 by more than tenfold.

In other words, the destination each company reaches under the banner of escaping NVIDIA was the same manufacturing and assembly passage as NVIDIA's. Thinking they had leaped over the monopoly's head, they all formed a queue before the same single road. This is the true nature of "our own chip to escape NVIDIA." Change the leading actor of design, and the irreplaceable layer beneath it has not changed.

That said, this ceiling is not fixed. That the bottleneck now sits at CoWoS and high-speed memory should be seen as something limited, for the time being, to 2025. In 2026, as next-generation products move to a finer manufacturing generation, the view holds that the production capacity of the compute chips themselves may turn tight in turn. Meanwhile, there are reports that the assembly constraint is heading toward easing through expanded production. The ceiling moves. It moves because which layer is "scarcest right now" swaps places from time to time. It should also be added that the quantity allocations cited here are all approximations based not on TSMC's official disclosures but on forward-looking forecasts and booking estimates by securities analysts.

The Management Implication — Advantage Is Decided in "the Lowest, Scarcest Layer"

If we extract a single lesson from this semiconductor structure that holds across industries, it comes down to this: competitive advantage is decided by who controls the lowest layer, the one with no substitute.

We usually speak of competition in the most visible layer — product features, brand, price. But that layer is easily imitated and changes hands quickly. The advantage that truly works lurks one or two layers down, in the scarce layer on which everyone is forced to depend in common. In semiconductors, that was manufacturing, assembly, and certain materials.

It is worth recasting this onto your own business. Beneath the lively surface of products and services, what does your company depend on? Is that dependency replaceable? Conversely, in which layer have you become "the only company" no one else can replace? A payment platform, a logistics warehouse, a particular license, accumulated data, a network of talent — the true nature of the "invisible ceiling" differs by industry. But the structure does not change: whoever holds it wins, quietly.

Easy to overlook is that this scarce layer is often plain and looks dull from the surface. Lithography systems, manufacturing chemicals, a single packaging step — none meet the consumer's eye. The star of semiconductors has always been the glamorous final product. Yet the throat of supply was held by the unglamorous steps several layers down. When inspecting a business, fix your gaze not on the flashiest strength but on the most irreplaceable dependency — that shift of perspective is the first step to seeing the structure.

The fact that the ceiling moves also matters for management. The layer that is scarcest at any given moment swaps places with advances in technology and investment in expanded production. The advantage, therefore, is not something secure once seized; it appears as the ongoing task of reading which layer will become the next ceiling. That NVIDIA seized the design moat and the assembly slots at the same time can be read as a move to lock down the next ceiling ahead of time, and the meaning of that groundwork comes into clear view.

The story of escaping NVIDIA teaches us a cold fact: there are scenes where changing the leading actor on the surface does not move the outcome. Beneath the players competing on design lay another layer, one level down, with no substitute. Pour resources into beating someone on the surface, and if you have not seized the structure beneath, the victory ends as borrowed goods. Conversely, hold even one plain, irreplaceable layer, and whoever becomes the leading actor on the surface, its benefits flow quietly your way. What management should truly ask may not be "whom are we competing with," but "who, with no substitute, sits at the bottom of that competition."

When a headline names the monopolist, ask whether another name does not lie quietly beneath it. That very habit of questioning becomes the eye that sees through the invisible ceiling.

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